A mapping table is a data structure used in computer systems (particularly in memory management, file systems, and storage systems) to maintain a correspondence (mapping) between two sets of addresses or identifiers -- typically logical/...

The Control Unit (CU) is a component of the CPU that directs the operation of the processor. It interprets instructions fetched from memory and generates the necessary control signals to coordinate the activities of the ALU, registers, m...

Microprogram and Symbolic Microprogram for FETCH Operation

What is a Microprogram?

A microprogram is a sequence of microinstructions stored in a special memory called control memory (or control store). Each microinstruction specifies one or more micro-operations (elementary hardware operations) to be performed in a single clock cycle.

Key points:

• Microprogramming is a technique used to implement the control unit of a CPU.
• The concept was introduced by Maurice Wilkes.
• Each machine instruction is interpreted by executing a corresponding sequence of microinstructions.
• Microinstructions are stored in ROM-based control memory.
• A microprogram is analogous to a program, but operates at the register-transfer (hardware) level.

Microprogrammed Control Unit uses control memory to generate control signals, rather than hardwired logic.

Symbolic Microprogram for FETCH Operation

The FETCH cycle retrieves an instruction from memory and places it in the Instruction Register (IR), then increments the Program Counter (PC).

Registers Used:

Symbolic Microprogram (FETCH Cycle):

Step    Micro-operation                     Comment
------  ----------------------------------  ---------------------------
T0:     MAR ← PC                           Transfer PC content to MAR
T1:     MBR ← M[MAR], PC ← PC + 1         Read memory into MBR;
                                            Increment PC simultaneously
T2:     IR ← MBR                           Load instruction into IR

Explanation of Each Step:

1. T0: MAR ← PC

   • The content of the Program Counter is transferred to the Memory Address Register.
   • This tells the memory which address to read from.

2. T1: MBR ← M[MAR], PC ← PC + 1

   • The instruction stored at the address in MAR is fetched from memory into MBR.
   • Simultaneously, PC is incremented to point to the next instruction.
   • These two micro-operations can occur in parallel (same clock cycle).

3. T2: IR ← MBR

   • The fetched instruction is transferred from MBR to the Instruction Register (IR).
   • After this, the DECODE phase begins.

Summary Flow:

PC --> MAR --> Memory Read --> MBR --> IR
                                PC + 1 --> PC

The FETCH microprogram typically requires 3 micro-steps (T0, T1, T2) and forms the first part of the instruction cycle in any CPU.

Memory hierarchy is an organization of different types of memory storage in a computer system, arranged in levels based on speed, cost, and capacity. The fundamental idea is that faster memory is more expensive and smaller in size, while...

A microprocessor is a single VLSI (Very Large Scale Integration) chip that integrates the entire CPU on one chip, including the ALU, control unit, and register array. It fetches instructions from memory, decodes them, and executes them t...

Memory hierarchy is an organization of different types of memory storage in a computer system, arranged in levels based on speed, cost, and capacity. The fundamental idea is that faster memory is more expensive and smaller in size, while...

The Control Unit (CU) is a component of the CPU that directs the operation of the processor. It interprets instructions fetched from memory and generates the necessary control signals to coordinate the activities of the ALU, registers, m...

Microprogram and Symbolic Microprogram for FETCH Operation

What is a Microprogram?

A microprogram is a sequence of microinstructions stored in a special memory called control memory (or control store). Each microinstruction specifies one or more micro-operations (elementary hardware operations) to be performed in a single clock cycle.

Key points:

• Microprogramming is a technique used to implement the control unit of a CPU.
• The concept was introduced by Maurice Wilkes.
• Each machine instruction is interpreted by executing a corresponding sequence of microinstructions.
• Microinstructions are stored in ROM-based control memory.
• A microprogram is analogous to a program, but operates at the register-transfer (hardware) level.

Microprogrammed Control Unit uses control memory to generate control signals, rather than hardwired logic.

Symbolic Microprogram for FETCH Operation

The FETCH cycle retrieves an instruction from memory and places it in the Instruction Register (IR), then increments the Program Counter (PC).

Registers Used:

Symbolic Microprogram (FETCH Cycle):

Step    Micro-operation                     Comment
------  ----------------------------------  ---------------------------
T0:     MAR ← PC                           Transfer PC content to MAR
T1:     MBR ← M[MAR], PC ← PC + 1         Read memory into MBR;
                                            Increment PC simultaneously
T2:     IR ← MBR                           Load instruction into IR

Explanation of Each Step:

1. T0: MAR ← PC

   • The content of the Program Counter is transferred to the Memory Address Register.
   • This tells the memory which address to read from.

2. T1: MBR ← M[MAR], PC ← PC + 1

   • The instruction stored at the address in MAR is fetched from memory into MBR.
   • Simultaneously, PC is incremented to point to the next instruction.
   • These two micro-operations can occur in parallel (same clock cycle).

3. T2: IR ← MBR

   • The fetched instruction is transferred from MBR to the Instruction Register (IR).
   • After this, the DECODE phase begins.

Summary Flow:

PC --> MAR --> Memory Read --> MBR --> IR
                                PC + 1 --> PC

The FETCH microprogram typically requires 3 micro-steps (T0, T1, T2) and forms the first part of the instruction cycle in any CPU.

RISC vs CISC Architecture and Booth's Multiplication Algorithm

STEP 1 - EXTRACT: Given Data

• Multiply 9 × 7 using Booth's Algorithm
• Multiplicand $M = 9$
• Multiplier $Q = 7$
• Both positive, need signed 2's complement representation

Bit-width check: $9 = 1001_2$ (4 bits). To represent as signed positive, we need a leading 0, so minimum 5 bits: $9 = 01001$. Similarly $7 = 00111$. Use $n = 5$ bits.

Part 1: RISC vs CISC Architecture [4 Marks]

RISC (Reduced Instruction Set Computer) uses a small set of simple, fixed-length instructions, each executing in a single clock cycle.

CISC (Complex Instruction Set Computer) uses a large set of complex, variable-length instructions where one instruction may perform several low-level operations over multiple cycles.

Part 2: Booth's Multiplication -- 9 × 7 [6 Marks]

Booth's Rules

Setup

• $M = 01001$
• $-M = 10111$ (2's complement of $M$)
• $Q = 00111$
• $A = 00000$, $Q_{-1} = 0$, $n = 5$

Step-by-Step

Initial: $A=00000,\ Q=00111,\ Q_{-1}=0$

Cycle 1: $Q_0 Q_{-1} = 10 \Rightarrow A = A - M$ $$A = 00000 + 10111 = 10111$$ Before ASR: $A=10111,\ Q=00111,\ Q_{-1}=0$ After ASR: $A=11011,\ Q=10011,\ Q_{-1}=1$

Cycle 2: $Q_0 Q_{-1} = 11 \Rightarrow$ no op After ASR: $A=11101,\ Q=11001,\ Q_{-1}=1$

Cycle 3: $Q_0 Q_{-1} = 11 \Rightarrow$ no op After ASR: $A=11110,\ Q=11100,\ Q_{-1}=1$

Cycle 4: $Q_0 Q_{-1} = 01 \Rightarrow A = A + M$ $$A = 11110 + 01001 = 00111$$ Before ASR: $A=00111,\ Q=11100,\ Q_{-1}=1$ After ASR: $A=00011,\ Q=11110,\ Q_{-1}=0$

Cycle 5: $Q_0 Q_{-1} = 00 \Rightarrow$ no op After ASR: $A=00001,\ Q=11111,\ Q_{-1}=0$

Summary Table

Result

$$AQ = 00001,11111$$

Converting to decimal: $0000111111_2 = 63$

$$9 \times 7 = 63 \checkmark$$

Conclusion: Booth's algorithm correctly yields the product 63.

A microprocessor is a single VLSI (Very Large Scale Integration) chip that integrates the entire CPU on one chip, including the ALU, control unit, and register array. It fetches instructions from memory, decodes them, and executes them t...

• Dividend: stored at memory location 8050H - Divisor: stored at memory location 8051H - Quotient: store at memory location 8052H - Remainder: store at memory location 8053H --- The 8085 microprocessor does not have a direct division ins...

The basic computer (as described in the classic Morris Mano model) uses a set of registers to hold temporary data, addresses, and control information during program execution. The register organization defines the internal structure of t...

Pipelining is a technique used in computer architecture to improve CPU performance by overlapping the execution of multiple instructions. Instead of completing one instruction fully before starting the next, the processor divides instruc...

Booth's algorithm is an efficient algorithm for multiplying two signed binary numbers represented in 2's complement form. It handles both positive and negative numbers uniformly and reduces the number of additions/subtractions required. ...

--- - I/O devices are given a separate address space from memory. - Special I/O instructions (such as IN and OUT) are used to communicate with I/O devices. - The processor has separate control lines for memory and I/O operations (e.g., M...

Short Notes (Any Two): 5 Marks

a) DMA (Direct Memory Access)

DMA is a technique that allows peripheral devices to transfer data directly to/from memory without involving the CPU for each byte of transfer.

Key Points:

• Normally, the CPU handles all data transfers between I/O devices and memory, which wastes CPU time.
• In DMA, a special hardware unit called the DMA Controller (DMAC) takes over the system bus temporarily.
• The CPU sends the starting address, block size, and direction (read/write) to the DMAC, then releases the bus.
• The DMAC performs the transfer and sends an interrupt to the CPU when done.

Steps in DMA Transfer:

1. CPU initializes the DMAC (address, count, mode).
2. DMAC sends a Bus Request (BR) to the CPU.
3. CPU grants the bus via Bus Grant (BG) and suspends its activity.
4. DMAC transfers data directly between memory and I/O device.
5. After transfer, DMAC releases the bus and interrupts the CPU.

Advantages:

• Very fast data transfer.
• CPU is free to do other tasks.
• Suitable for high-speed devices like disk drives, video cards.

b) Flags in 8085 Microprocessor

The 8085 microprocessor has a special 8-bit Flag Register (also called the Program Status Word) that reflects the result of arithmetic and logical operations.

The 8085 has 5 flags:

Flag Register Bit Layout:

D7   D6   D5   D4   D3   D2   D1   D0
 S    Z    0   AC    0    P    1   CY

Importance:

• Flags are used by conditional jump instructions (e.g., JZ, JNZ, JC, JNC) to control program flow.
• They are automatically set or reset after arithmetic/logical operations.

c) Instruction Set

An instruction set (also called Instruction Set Architecture, ISA) is the complete collection of instructions that a processor can understand and execute.

Key Points:

• It defines the interface between hardware and software.
• Each instruction tells the CPU what operation to perform, on what data, and where to store the result.

Types of Instructions:

Instruction Format:

An instruction typically has:

• Opcode: specifies the operation
• Operand(s): specifies the data or address

Types of Instruction Sets:

• RISC (Reduced Instruction Set Computer): fewer, simpler instructions (e.g., ARM)
• CISC (Complex Instruction Set Computer): many complex instructions (e.g., x86, 8085)

Importance:

• Determines the capability and performance of a processor.
• Programmers and compilers use the instruction set to write programs.

(a) Addressing Modes An addressing mode refers to the way in which the operand (data) is specified in an instruction. The 8085 microprocessor supports the following addressing modes: --- - The operand (data) is directly specified in the ...

Assembly Language Program: Multiply 08H × 09H (8085 Microprocessor)

STEP 1 - Given Data

• Multiplicand = 08H
• Multiplier = 09H
• Product storage address = 8050H
• Carry (higher byte) storage address = 8051H

STEP 2 - Solution

Concept

The 8085 has no hardware multiply instruction, so multiplication is done by repeated addition: add the multiplicand (08H) to itself the number of times given by the multiplier (09H). Any carry beyond 8 bits is counted in a separate register.

Program

        LXI  H, 8050H   ; HL points to product location 8050H
        MVI  B, 08H     ; B = multiplicand (08H)
        MVI  C, 09H     ; C = multiplier / counter (09H)
        MVI  A, 00H     ; A = 00H (accumulate product low byte)
        MVI  D, 00H     ; D = 00H (accumulate carry / high byte)

LOOP:   ADD  B          ; A = A + B
        JNC  SKIP       ; if no carry, skip
        INR  D          ; else increment high byte
SKIP:   DCR  C          ; decrement counter
        JNZ  LOOP       ; repeat until C = 0

        MOV  M, A       ; store product low byte at 8050H
        INX  H          ; HL points to 8051H
        MOV  M, D       ; store carry / high byte at 8051H

        HLT             ; halt

Execution Trace

Verification

$$08H \times 09H = 8 \times 9 = 72_{10} = 48H$$

Since the result 72 fits in one byte (< 256), no carry is generated, so D = 00H.

Result in Memory

The final product is 48H with carry 00H.

Arithmetic micro-operations are basic operations performed on numeric data stored in registers. They involve arithmetic computations on binary data. --- The most fundamental arithmetic micro-operation. The contents of two registers are a...

A mapping table is a data structure used in computer systems (particularly in memory management, file systems, and storage systems) to maintain a correspondence (mapping) between two sets of addresses or identifiers -- typically logical/...