BIT · Semester I
Digital Logic syllabus
Official TU syllabus for Digital Logic (BIT103): 10 units, 54 topics. Every unit links to its notes and solved questions.
1
Number Systems and Conversions
13 Q- Binary decimal octal hexadecimal conversions
- Fractional number conversions
- Complements of decimal numbers
- Binary arithmetic operations
- Binary subtraction using complements
2
Boolean Algebra and Logic Gates
5 Q- Boolean theorems and De Morgan's laws
- Logic gates and universal gates
- NAND and NOR gate realization
- Exclusive-OR and exclusive-NOR gates
- Boolean function simplification
3
Combinational Logic Simplification
8 Q- Karnaugh map simplification
- Sum of products and product of sums
- Minterms and maxterms representation
- Don't care conditions in K-maps
- Boolean function minimization techniques
4
Combinational Logic Circuits
10 Q- Half adder and full adder design
- Half subtractor and full subtractor design
- Binary parallel adder
- Magnitude comparator circuits
- Combinational circuit design methodology
5
Decoders and Encoders
8 Q- Decoder design and operation
- BCD to decimal decoder
- BCD to seven-segment decoder
- BCD to excess-3 code converter
- Encoder circuits
6
Multiplexers and Demultiplexers
5 Q- Multiplexer design and operation
- Multiplexer implementation using smaller multiplexers
- Function implementation using multiplexers
- Demultiplexer circuits
7
Programmable Logic Devices
3 Q- Programmable logic array design
- Read-only memory implementation
- Function implementation using ROM
- Programmable logic device types
8
Flip-Flops and Latches
11 Q- SR latch and clocked RS flip-flop
- JK flip-flop design and operation
- Master-slave JK flip-flop
- D flip-flop design and characteristics
- T flip-flop operation
- Race condition and triggering methods
- Flip-flop characteristic tables and equations
9
Sequential Circuits and Counters
10 Q- Sequential circuit design methodology
- State diagrams and excitation tables
- Ripple counters and synchronous counters
- Binary counters and modulo counters
- Ring counter and Johnson counter
- Up-down counters
- Counter design using flip-flops
10
Shift Registers and Data Processing
11 Q- Shift register types and operation
- Serial-in serial-out shift register
- Parallel-in parallel-out shift register
- Shifter circuits
- Parity generator and checker
- Status register and processor registers
- ALU and common bus architecture
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