Computer Organization and Architecture 2024-25 question paper

The basic functional units of a digital computer are as follows.

• Input unit: it takes in data and programs.
• Memory unit: it stores the data and programs.
• Arithmetic and logic unit (ALU): it performs arithmetic and logic operations.
• Control unit: it fetches, decodes and controls the execution of instructions.
• Output unit: it gives the results to the user.

The ALU and the control unit together are called the CPU.

General-purpose registers are the CPU registers that a programmer can use freely for any purpose. They are not tied to one special job. They can hold data, operands, intermediate results, or memory addresses (as pointers or index values).

Examples are R0 to R15 in ARM, or AX, BX, CX and DX in the Intel 8086. Instructions can name them directly, as in ADD R1, R2. Because the registers are inside the CPU, they are much faster than memory. Using more of them reduces the number of memory accesses and makes the program run faster.

Floating point representation stores a real number using a sign, a power of 2 and a fraction, like scientific notation. A number is written as $(-1)^s \times 1.f \times 2^{e}$.

It has three fields: the sign bit $s$, the biased exponent $E = e + \text{bias}$, and the fraction (mantissa) $f$. In IEEE 754 single precision, 32 bits are split as 1, 8 and 23, with bias 127. Moving the binary point changes the exponent, so the same bits can hold very large and very small numbers. For example, $6.5 = 1.101_2 \times 2^2$.

The arithmetic and logic unit (ALU) is the part of the processor that does all the calculations and the decisions on data.

It performs arithmetic operations such as add, subtract, increment and compare, and logic operations such as AND, OR, NOT, XOR and shifts. The control unit sends select signals that choose the operation. The ALU takes its operands from registers or the accumulator, produces the result, and sets status flags such as zero, carry, sign and overflow. The program uses these flags for branching.

A micro operation is a simple operation done on data in registers during one clock pulse. Instructions are carried out as a series of micro operations. There are four types.

• Register transfer: copy data from one register to another, for example $R1 \leftarrow R2$.
• Arithmetic: add, subtract, increment or decrement, for example $R3 \leftarrow R1 + R2$.
• Logic: bit-wise AND, OR, XOR and complement.
• Shift: move bits left or right in a register.

ROM (read-only memory) is a non-volatile memory, so it keeps its contents when the power is off. Its main purpose is to store programs and data that must always be present and need not change. Examples are the bootstrap loader that starts the computer, the BIOS or firmware, and fixed tables such as character codes. The CPU can only read it during normal work. ROM is also used to hold microprograms in the control unit and to implement lookup tables and combinational logic.

Peripheral devices are the external devices that are connected to the computer to give it input, take output from it, or store data. They are of three kinds.

• Input devices: keyboard, mouse, scanner, microphone, webcam, joystick, light pen, barcode reader.
• Output devices: monitor, printer, plotter, speakers, projector.
• Storage (secondary) devices: hard disk, SSD, magnetic tape, CD/DVD, pen drive.

Communication devices such as a modem and a network card are also peripherals.

A digital system has registers, a bus and a memory. Data moves between them by register transfers, bus transfers and memory transfers. All of them happen under the control of timing signals and are written in register transfer language.

Register to register transfer

The content of one register is copied to another by $R2 \leftarrow R1$. R1 keeps its value. The transfer takes place only if a control condition is true, written as

$$P:\ R2 \leftarrow R1$$

When $P = 1$, the load input of R2 is enabled and the transfer takes place at the next clock pulse.

Transfer through a common bus

If a computer has many registers, joining each pair by wires is costly. So a common bus is used. The select lines of multiplexers (or the enable of three-state buffers) pick the source register, which puts its content on the bus. The destination register has its load input enabled. For example, to do $R3 \leftarrow R1$, the select lines choose R1 and the load of R3 is enabled. Only one source drives the bus in a clock pulse.

Memory transfer

Memory is accessed through the address register (AR) and the data register (DR). The AR holds the address of the word. DR holds the data being moved.

For a read, the address is placed in AR and the read signal is given. The memory places the word on the data lines, and it is loaded into DR.

$$Read:\ DR \leftarrow M[AR]$$

For a write, the address is placed in AR, the data in DR, and the write signal is given. The memory stores DR at the address AR.

$$Write:\ M[AR] \leftarrow DR$$

Each of these operations takes one memory cycle. A word transferred from memory to the CPU always goes through DR, and a word to be written is always taken from DR.

Example

To add a number from memory into a register, the sequence is $AR \leftarrow 500$, then $DR \leftarrow M[AR]$, then $R1 \leftarrow R1 + DR$. The first step loads the address, the second reads memory, and the third uses the ALU to add. In this way, data moves between registers, buses and memory, one controlled step at a time.

Booth's algorithm multiplies two signed numbers in 2's complement form. Its idea is that a run of 1s in the multiplier, such as $0111100$, equals a difference of two powers of 2:

$$2^{6} - 2^{2} = 64 - 4 = 60 = 0111100_2$$

So instead of adding $M$ for every 1 bit, we subtract $M$ at the start of the run and add $M$ after its end.

Procedure. The multiplicand is kept in $M$. The multiplier is kept in $Q$, with an extra bit $Q_{-1} = 0$ on its right. $A$ is cleared to 0. We repeat the following $n$ times, once for each bit of the multiplier. If $Q_0Q_{-1}$ is $10$, we do $A = A - M$. If it is $01$, we do $A = A + M$. If it is $00$ or $11$, we do nothing. Then we shift $A$, $Q$ and $Q_{-1}$ right by one place, keeping the sign of $A$ (arithmetic shift right, ASR). At the end, $AQ$ holds the $2n$-bit product.

Example. Multiply $(+7) \times (-3)$ with 4-bit registers. Here $M = 0111$, $-M = 1001$ and $Q = 1101$.

So $AQ = 11101011$. The leading bit is 1, so the product is negative. Its 2's complement is $00010101 = 21$. Therefore $(+7) \times (-3) = -21$.

How it optimises multiplication. Long runs of equal bits in the multiplier need no additions at all, only shifts. For example, a multiplier with eight 1s in a row needs only one subtraction and one addition, instead of eight additions.

Advantages over the traditional method.

• It handles positive and negative numbers with the same circuit, so no separate sign logic is needed.
• It works directly on 2's complement numbers, so no correction step is needed for a negative multiplier.
• It is faster when the multiplier has long runs of 1s.
• The control is simple, with one add or subtract and one shift per cycle.

The worst case is a multiplier with alternating bits, like $0101$, where every cycle needs an add or subtract. Then Booth's method is no faster than shift-and-add.

In a microprogrammed control unit, each microinstruction holds the control signals for one step. The way these signals are put into the microinstruction gives two styles, horizontal and vertical.

Horizontal microprogramming

In this style, each control signal of the machine has its own bit in the microinstruction. If the bit is 1, the signal is active. So the signals go to the hardware straight, with no decoder in between. Many signals can be active together, so many micro operations can be done in parallel in a single step. The word is very wide, often over 100 bits.

• Advantages: fast, high parallelism, little decoding, simple control.
• Disadvantages: large control memory, long words, and many bits are zero in most words, so space is wasted. The programmer needs to know the hardware in detail.

Vertical microprogramming

Here the control signals are put in groups, and each group is coded in a small field. For example, 3 bits can select one of 8 signals. A decoder for each field turns the code into the signal lines. Only one signal per field can be active at a time, so less parallelism is possible. The word is short.

• Advantages: small control memory, short words, easier to write and understand, like a machine language.
• Disadvantages: slower, because of decoding time, and less parallel.

Example. Let there be 16 control signals. A horizontal microinstruction needs 16 bits for them. A vertical one that groups them in two fields of 8 signals needs two 3 bit fields, which is 6 bits. So the memory is smaller, but a decoder is needed for each field and only one signal in a field can be on.

Many designs use a mix, called a nanoprogramming or mixed scheme, to get a balance between speed and size.

Auxiliary (secondary) memories hold large amounts of data permanently, at a low cost per bit. They are not directly accessed by the CPU. Their data is first brought into main memory. They are slow, but non-volatile.

Magnetic disk

A magnetic disk has circular platters coated with magnetic material. The platters spin, and a read/write head moves over them. Data is stored in tracks and sectors. It is a direct access device. The access time is seek time plus rotational latency plus transfer time. It has a large capacity (hundreds of GB to TB), a reasonably low cost and a fast transfer rate. It is used as the main storage for the operating system, programs and files. It is also the base of virtual memory. Its drawbacks are moving parts, noise, and damage from shocks.

Magnetic tape

A magnetic tape is a long plastic strip coated with magnetic material, held in reels or cartridges. Data is written in tracks along the tape. It is a sequential access device. To reach a record, the tape must be run past all earlier records, so the access is slow. But it has a very low cost per bit and a very high capacity, and it is easy to store. It is used for backup, archives and bulk data. A record can be read only in order, so it is not suitable for random access.

Optical disk

An optical disk stores data as pits and lands on a spiral track. A laser reads them by the difference in reflected light. CD-ROM holds about 700 MB, DVD about 4.7 GB, and Blu-ray about 25 GB. Read-only, write-once and rewritable forms exist. Optical disks are cheap, light and long lasting, and they are good for distributing software, music and movies. They are slower than a magnetic disk and have less capacity.

Comparison

The functions of these memories are permanent storage, backup, data exchange between machines, and extending the main memory through virtual memory.

An I/O port is a point of connection, with an address, through which the CPU exchanges data with an external device. A port is usually a register (or a group of registers) in an I/O interface chip. Each port is joined to the device on one side and to the CPU buses on the other.

Functions of I/O ports

• Data exchange: the port holds the data word on its way between the CPU and the device. An input port passes data from a device to the CPU. An output port passes data from the CPU to a device.
• Addressing: each port has a unique address (or port number). The CPU selects a port by this address. Isolated I/O uses the IN and OUT instructions, and memory mapped I/O uses ordinary memory instructions.
• Buffering: the port holds the data until the receiving side is ready. In this way, the fast CPU and the slow device work at their own speeds.
• Control and status: control ports let the CPU command the device, for example to start or stop it. Status ports let the CPU read flags such as ready, busy and error.
• Signal conversion: the port may convert the voltage levels and the form of data, for example between parallel and serial.

Characteristics of ports

• Parallel ports send many bits at the same time on several lines. They are fast over short distances. The printer port is an example.
• Serial ports send one bit at a time on a single line. They need fewer wires and work over longer distances. RS-232, USB and SATA are examples.
• Input, output or bidirectional: a port may work in one direction or in both.
• Width: a port is typically 8, 16 or 32 bits wide.
• Programmable: in chips like the 8255, software decides if a port is input or output and how it works.

  CPU <==== data/address/control buses ====> [Port] <----> Device

Significance

Ports make the CPU independent of the details of the devices. The CPU only reads and writes port registers, and the interface deals with the device. New devices can be attached to a standard port such as USB without changing the CPU. Ports also provide a single controlled point, so that the CPU can check the status and avoid errors during exchange of data. Without ports, there would be no orderly way to join the CPU to the outside world.

Processor organization

A processor has a datapath and a control unit. The datapath holds the registers, the ALU and the buses. The control unit gives the signals. The main registers are the program counter (PC), instruction register (IR), address register (AR), data register (DR), accumulator (AC) and general registers.

Instruction fetch, decode and execute

The CPU repeats a basic cycle for every instruction.

• Fetch: the address in PC goes to AR. The instruction is read into IR, and PC is incremented.
• Decode: the control unit decodes the opcode and finds the addressing mode.
• Execute: the ALU or other unit does the operation. The operands are read from registers or memory, and the result is stored.

$$AR \leftarrow PC,\quad IR \leftarrow M[AR],\quad PC \leftarrow PC + 1$$

The control unit times these steps with a sequence counter, and it may check for interrupts at the end.

Pipelining

Pipelining overlaps the cycles of different instructions. The work is split into stages such as fetch, decode, execute, memory and write back. While one instruction is executed, the next is decoded, and a third is fetched. After the pipeline fills, one instruction finishes in every clock cycle. For $k$ stages and $n$ instructions:

$$S = \frac{nk}{k + n - 1}$$

Hazards (structural, data and control) can slow it, and they are cured by stalls, forwarding and branch prediction.

Parallel processing techniques

Parallel processing means doing many operations at the same time to increase speed. It can be done at several levels:

• Instruction-level: pipelining and superscalar processors that issue many instructions in a cycle.
• Data-level: vector and array processors, and GPUs, apply one instruction to many data items.
• Thread and processor-level: multicore and multiprocessor systems run different tasks or threads together.

In Flynn's classification there are four types: SISD, SIMD, MISD and MIMD. A normal single core CPU is SISD, a vector unit is SIMD, and a multicore machine is MIMD.

Control

Control can be hardwired for speed or microprogrammed for flexibility. In all cases the control unit decides what happens in each clock pulse, and the processor organization decides how fast the work is done.

The three buses together make the system bus. Their characteristics are compared below.

Address bus

It selects the one location that the CPU wants. With $n$ address lines, the CPU can address $2^n$ locations. For example, 16 lines give $2^{16} = 65536$ locations, that is 64 K.

Data bus

It carries the word that is read or written. A 32-bit data bus moves 32 bits in one transfer. A wider data bus gives a faster system.

Control bus

It carries signals like memory read, memory write, I/O read, I/O write, clock, interrupt request and bus grant. It tells all the units when and how to use the address and data buses. In short, the address bus says where, the data bus says what, and the control bus says when and how.

Example of how they work together

Suppose the CPU wants to read a word from memory. It places the address on the address bus. It then activates the memory read signal on the control bus. The memory finds the location and puts the word on the data bus. The CPU takes the word from the data bus. For a write, the CPU puts the address on the address bus and the data on the data bus, and the control bus carries the memory write signal. All three buses are therefore needed in every transfer, and a fault in any one of them stops the system.

A look-ahead carry adder finds all carry bits at the same time, directly from the inputs. For each bit $i$ it uses the generate signal $G_i = A_iB_i$ and the propagate signal $P_i = A_i \oplus B_i$. Then:

$$S_i = P_i \oplus C_i \qquad C_{i+1} = G_i + P_iC_i$$

If we replace each carry by the one before it, every carry depends only on $G$, $P$ and $C_0$:

$$C_1 = G_0 + P_0C_0$$

$$C_2 = G_1 + P_1G_0 + P_1P_0C_0$$

$$C_3 = G_2 + P_2G_1 + P_2P_1G_0 + P_2P_1P_0C_0$$

Each of these is a two-level AND-OR circuit. So all carries are ready after two gate delays, and they do not wait for each other.

A ripple carry adder is a chain of full adders. The carry out of each stage is the carry in of the next one. The last sum bit is ready only after the carry has passed through all $n$ stages. For a 4-bit adder with two gate delays per stage, this takes about 8 gate delays.

Comparison

Advantages of the look-ahead adder: it is much faster, and the speed is nearly independent of word length for one block.

Disadvantages: it needs many more gates, so it costs more and uses more power. For long words the AND and OR gates need too many inputs, so in practice the adder is built from 4-bit blocks joined by a second level of look-ahead.

Signed operand multiplication means multiplying numbers that may be positive or negative. There are three common ways.

Sign-magnitude method. The sign and the magnitude are handled separately. The sign of the product is the XOR of the two signs. The magnitudes are multiplied by the shift-and-add method. For example, $5 \times (-3)$: the magnitudes are $101$ and $011$. Adding the shifted copies gives:

$$101 + 1010 = 1111 = 15$$

The signs are $0 \oplus 1 = 1$, so the product is negative. Therefore $5 \times (-3) = -15$.

2's complement method. The numbers are kept in 2's complement form. The multiplicand is first sign-extended to the length of the product. If the multiplier is negative, its leftmost bit has the negative weight $-2^{n-1}$. So the partial product made by that bit is subtracted and not added. For $5 \times (-3)$, the multiplier is $1101$, and the multiplicand is $0101$. The bit weights are $-8, +4, 0, +1$, so:

$$5 \times (-3) = 5 \times 1 + 5 \times 4 - 5 \times 8 = 5 + 20 - 40 = -15$$

This avoids converting the multiplier to a positive number.

Booth's algorithm. It handles signed multipliers in a single uniform procedure. Each cycle checks the pair $Q_0Q_{-1}$. The pair $10$ subtracts the multiplicand, the pair $01$ adds it, and the pairs $00$ and $11$ do nothing. After each cycle $A$, $Q$ and $Q_{-1}$ are shifted right with the sign of $A$ kept. After $n$ cycles, the $2n$-bit product is in $AQ$. It needs no separate sign logic, and it skips runs of equal bits.

Comparison

In all methods the product of two $n$-bit numbers needs $2n$ bits. Hardware multipliers usually use Booth's algorithm or its improved form, because it is simple and works for both signs.

In a microprogrammed control unit, each microinstruction holds the control signals for one step. The way these signals are put into the microinstruction gives two styles, horizontal and vertical.

Horizontal microprogramming

In this style, each control signal of the machine has its own bit in the microinstruction. If the bit is 1, the signal is active. So the signals go to the hardware straight, with no decoder in between. Many signals can be active together, so many micro operations can be done in parallel in a single step. The word is very wide, often over 100 bits.

• Advantages: fast, high parallelism, little decoding, simple control.
• Disadvantages: large control memory, long words, and many bits are zero in most words, so space is wasted. The programmer needs to know the hardware in detail.

Vertical microprogramming

Here the control signals are put in groups, and each group is coded in a small field. For example, 3 bits can select one of 8 signals. A decoder for each field turns the code into the signal lines. Only one signal per field can be active at a time, so less parallelism is possible. The word is short.

• Advantages: small control memory, short words, easier to write and understand, like a machine language.
• Disadvantages: slower, because of decoding time, and less parallel.

Example. Let there be 16 control signals. A horizontal microinstruction needs 16 bits for them. A vertical one that groups them in two fields of 8 signals needs two 3 bit fields, which is 6 bits. So the memory is smaller, but a decoder is needed for each field and only one signal in a field can be on.

Real designs often take a middle path between the two, to balance speed and memory size.

Microprogram sequencing means choosing the order in which microinstructions are read from the control memory. Each machine instruction is carried out by a small program of microinstructions, called a microroutine. The sequencer must start the right routine, move through it, and then go back to fetch the next instruction.

Structure

The control address register (CAR) holds the address of the microinstruction to be read. A multiplexer feeds CAR from different sources. A branch logic unit tests a status bit. An incrementer gives CAR plus one. A mapping logic converts an opcode into a starting address. A subroutine register (SBR) keeps the return address.

How the next address is found

1. Sequential flow: CAR is incremented to give the next microinstruction.
2. Branch: if the condition in the microinstruction is true, its address field is loaded in CAR, else CAR is incremented.
3. Mapping: at the end of the fetch routine, the opcode in IR is mapped to the first address of the routine for that instruction.
4. Call and return: a micro-subroutine call saves CAR plus one in SBR and jumps. A return loads SBR back in CAR.

How a complex instruction executes

Take a complex instruction such as multiply. First, the fetch microroutine reads the instruction into IR. Then the mapping logic turns the opcode into the starting address of the multiply routine. The first microinstruction is read, and its bits are sent as control signals. The next address is chosen by the sequencer. The routine may contain a loop, which repeats shift and add micro operations, with a branch microinstruction to test a counter. When the loop ends, the last microinstruction jumps back to the fetch routine.

So the complex instruction is built from many simple micro-steps: load registers, add, shift, test, and branch. No special hardware is needed for it. Only the sequence of microinstructions in the control memory is written for it.

Importance. With a good sequencer, complex instructions can be added or changed by changing only the microprogram. Common steps, such as the operand address calculation, are written once as a micro-subroutine, and shared. That is why microprogram sequencing makes execution of complex instructions possible in a clean way.

A computer needs a memory that is fast, large and cheap, but no single technology has all three. The memory hierarchy solves this by joining several kinds of memory in levels. The idea is that the CPU sees one fast and large memory.

Design

The levels are arranged from the top (nearest the CPU) to the bottom:

1. CPU registers: smallest and fastest, inside the processor.
2. Cache memory (SRAM): small and very fast, in one or more levels (L1, L2, L3).
3. Main memory (DRAM): medium speed, a few GB.
4. Secondary memory (disk, SSD): large and slow, holds all programs and data.
5. Tertiary memory (tape, optical): very large, very slow, used for backup.

Going down, the capacity and access time increase and the cost per bit falls. Going up, the reverse is true.

Basic concept: locality of reference

The design works because programs show locality of reference. Temporal locality means that a recently used item is likely to be used again soon. Spatial locality means that items near a used item are likely to be used next. So data in use is kept in the upper levels, and data moves between levels in blocks. When the CPU finds the data in the upper level it is a hit, and otherwise it is a miss and a block is brought from the lower level.

Performance

For a two-level system with hit ratio $h$, the average access time is

$$t_{avg} = h,t_1 + (1-h),t_2$$

With $h = 0.95$, $t_1 = 10$ ns and $t_2 = 100$ ns, $t_{avg} = 14.5$ ns. This is close to the speed of the fast level, but the size is that of the large level.

Data movement

Between cache and main memory, data moves in blocks and is managed by hardware. Between main memory and disk, data moves in pages and is managed by the operating system through virtual memory. Registers are loaded by the program instructions.

Semiconductor RAM is built from cells arranged in rows and columns. It allows both reading and writing and is volatile. The two main types are SRAM and DRAM.

SRAM (static RAM)

An SRAM cell is a bistable flip-flop made of six transistors. Two cross-coupled inverters keep one of two stable states for 1 and 0, and two access transistors connect the cell to a pair of bit lines (b and b').

        word line
   ------+----------+------
         |          |
      [T5]        [T6]
   b ----+--[ flip-flop ]--+---- b'
          (T1 to T4)

To read, the word line is made high. The access transistors turn on and the cell state appears on the bit lines, where a sense amplifier detects it. To write, the data and its complement are put on the bit lines, and the word line forces the flip-flop into the new state. The data stays as long as power is on, and no refresh is needed. SRAM is very fast but costly, and it takes a large area. It is used in cache.

DRAM (dynamic RAM)

A DRAM cell has one transistor and one capacitor. The charge on the capacitor stands for the bit: charged is 1 and discharged is 0.

   bit line ----[ T ]----+
                 |       |
   word line ----+     ===  C
                         |
                        GND

To write, the word line turns on the transistor, and the bit line charges or discharges the capacitor. To read, the transistor is turned on and the charge is shared with the bit line. A sense amplifier detects the small change. This read destroys the stored charge, so the data is written back at once. The charge also leaks, so each row must be refreshed every few milliseconds. DRAM is slower, but cheap and dense. It is used as main memory. The address is given in two parts, the row address (RAS) and then the column address (CAS), which saves pins.

Comparison

Role of peripheral devices

Peripheral devices connect a computer to the outside world. Without them, the CPU and memory could compute but could not receive any data or show any result. They have three roles.

• Input: devices such as the keyboard, mouse and scanner bring data and commands into the computer.
• Output: devices such as the monitor and printer show or print the results for the user.
• Storage: devices such as the hard disk, SSD and tape keep programs and data for a long time, as main memory loses its contents on power off.

Communication devices such as network cards and modems connect the computer to other computers.

Differences from the CPU

Peripherals differ from the CPU in many ways. They are slower, since they often have mechanical parts. They send data in different formats, for example serial bits or analog signals. They use different voltage levels and timing. Each device also works at its own speed. So the CPU cannot be connected to the device directly.

Interaction through the I/O interface and ports

An I/O interface is placed between the device and the CPU buses. It does the following work.

• It decodes the address and selects the right device.
• It holds data in a buffer register, to match the speeds.
• It changes the data format and signal levels.
• It gives status information, such as ready, busy and error, and takes commands.
• It raises interrupts when the device needs attention.

The CPU sees the interface as a few registers, called ports. These are the data port, the status port and the control port.

 CPU <--> System buses <--> [ I/O interface ] <--> Device
                           (data, status, control ports)

To output a character to a printer, the CPU first reads the status port to check that the printer is ready. Then it writes the character to the data port. The interface passes it to the printer with the correct handshake signals. The CPU can then be informed about completion by a status flag or by an interrupt.

To get a key from a keyboard, the key press sets the ready flag in the status port. The CPU reads the data port to get the key code, and this clears the flag.

The ports are addressed either by special IN and OUT instructions (isolated I/O), or by ordinary memory instructions (memory mapped I/O). Larger transfers use DMA, so that the CPU is not involved in every word. In this way the interface and ports let a fast CPU work smoothly with many different and slow devices.

Direct Memory Access (DMA) lets an I/O device move data to or from memory without the CPU handling each word. The CPU sets up the transfer in a DMA controller, which then takes over the buses. The controller is given the start address, the word count and the direction. It requests the buses from the CPU, gets a grant, and moves the words one after another. At the end, it interrupts the CPU.

The techniques differ in how the controller shares the bus with the CPU.

Burst (block) transfer

The controller keeps the buses until the whole block is moved. The CPU is blocked from memory during this time. The transfer is very fast, and it suits fast devices like disks. The drawback is that the CPU may have to wait for a long time.

Cycle stealing

The controller takes the bus for a single memory cycle, moves one word, and gives the bus back. This is repeated for each word. The CPU loses only one cycle at a time, so it keeps running, though a little slower. The transfer is slower than burst mode.

Transparent (hidden) DMA

The controller uses the bus only when the CPU does not need it, for example while the CPU is decoding an instruction or working inside the ALU. The CPU is never slowed down. But the speed of the transfer depends on how free the bus is, and the control logic is complicated.

Other arrangements

In a single-operation DMA, one word is transferred per request. In a block DMA, a block is moved for one request, as above. With a daisy chain or a priority circuit, many devices can use one controller, and the highest priority device is served first.

Comparison

Advantages

The CPU is free for other jobs during the transfer. The data rate is high, since each word does not need an instruction. The CPU takes part only at the start and at the end of the block.

DMA is used for disks, network cards, graphics and sound cards, where large blocks must move quickly.