2078

CSC167 · TU past paper

Microprocessor 2078 question paper

The complete TU 2078 exam paper for Microprocessor (CSC167), all 12 questions with solved model answers written to the mark scheme.

Tap a question to open its answer.

  1. 110 marksInstruction CycleAnswer

    Explain instruction cycle, machine cycle and T-states. Draw timing diagram of IN instruction with brief description.[10]

    --- The time required to fetch and execute an entire instruction is called the instruction cycle. An instruction cycle consists of two parts: - The CPU fetches the opcode from memory using the address stored in the Program Counter (PC). ...

  2. 210 marks80286Answer

    Draw block diagram of 80286 microprocessor and explain its main four functional sub-units. Differentiate between Real Address Mode and Protected Virtual address mode.[10]

    --- --- The 80286 microprocessor is internally divided into four functional sub-units that operate in a pipelined fashion to improve performance: --- - The Bus Unit is responsible for all external bus operations. - It manages the 24-bit ...

  3. 310 marksNumericalSimple sequence programsAnswer

    Explain LXI and CMP instruction. Write an assembly language program for 8-bit microprocessor to divide 8 bit data stored in memory location 8050 by 8 bit data stored in 8051 and store the quotient in 8052 and remainder in 8053.[10]

    LXI (Load Register Pair Immediate) is a 3-byte instruction that loads 16-bit immediate data into a register pair (BC, DE, HL) or the Stack Pointer (SP). Syntax: LXI rp, 16-bit data Operation: - The low-order byte (byte 2 of the instructi...

  4. 45 marksNumericalProgrammable Peripheral Interface 8255AAnswer

    What are the different modes of parallel communication? Construct a control word for 8255 PPI for following configuration: .a) Port A and Port C_upper = mode 0 .b) Port B and Port C_lower = mode 0 c.) Port A and Port C_upper as input port d.) Port B and Port C_lower as output port [5]

    Configuration requirements: - a) Port A and Port Cupper = Mode 0 - b) Port B and Port Clower = Mode 0 - c) Port A and Port Cupper = Input - d) Port B and Port Clower = Output Mode 0 - Simple Input/Output - Basic I/O without handshaking. ...

  5. 55 marksDirect Memory AccessAnswer

    Differentiate between interrupt based I/O and DMA based I/O. Explain based DMA operation in brief. [5]

    Aspect Interrupt Based I/O DMA Based I/O --------- CPU Involvement CPU is interrupted and handles each data transfer CPU is minimally involved; DMA controller handles transfer Data Transfer Data passes through CPU registers Data transfer...

  6. 65 marksInstruction TypesAnswer

    Differentiate between PUSH and POP instruction with example illustrating the use of these instruction. [5]

    PUSH and POP are stack-related data transfer instructions in the 8085 microprocessor. They are used to store and retrieve data from the stack (a special region of memory that operates on the Last In First Out - LIFO principle). The Stack...

  7. 75 marksNumericalSimple sequence programsAnswer

    Write an assembly language program for 16 bit microprocessor to reverse the string 'This is Microprocessor' [5]

    • Target processor: 16-bit microprocessor (8086) - String to reverse: This is Microprocessor - Character count: Let me count precisely: - This = 4 - space = 1 - is = 2 - space = 1 - Microprocessor = 14 - Total = 4 + 1 + 2 + 1 + 14 = 22 c...
  8. 85 marksDemultiplexing of BusesAnswer

    What is the use of $AD_7-AD_0$ in 8085 microprocessor? Explain address de-multiplexing process in 8085 microprocessor with suitable diagram. [5]

    --- The 8085 microprocessor has only 40 pins. To reduce the pin count while still supporting a 16-bit address bus and an 8-bit data bus, Intel used a technique called multiplexing. The pins AD₇-AD₀ serve a dual purpose: Time Period Funct...

  9. 95 marksAddressing ModesAnswer

    What is mean by addressing mode? Explain all the addressing mode available in 8085 microprocessor. [5]

    An addressing mode refers to the way in which the operand (data) of an instruction is specified or accessed. It defines the method used by the microprocessor to identify the location of the data to be operated upon. Different addressing ...

  10. 105 marks80386Answer

    Explain Register Organization in 80386 microprocessor. [5]

    Register Organization in 80386 Microprocessor


    Register Organization of 80386

    The 80386 is a 32-bit microprocessor. Its registers are organized into the following groups:


    1. General Purpose Registers (32-bit)

    These are 32-bit registers used for arithmetic, logical, and data transfer operations. They are extensions of the 16-bit 8086 registers.

    RegisterFull NameDescription
    EAXExtended AccumulatorUsed for arithmetic and I/O operations
    EBXExtended Base RegisterUsed as base address in memory addressing
    ECXExtended Count RegisterUsed as loop counter
    EDXExtended Data RegisterUsed in I/O and multiply/divide operations
    ESIExtended Source IndexSource pointer for string operations
    EDIExtended Destination IndexDestination pointer for string operations
    EBPExtended Base PointerPoints to base of stack frame
    ESPExtended Stack PointerPoints to top of stack
    • The lower 16 bits of each register can be accessed as AX, BX, CX, DX, SI, DI, BP, SP.
    • The lower 8 bits of AX, BX, CX, DX can be accessed as AL, AH, BL, BH, CL, CH, DL, DH.

    2. Segment Registers (16-bit)

    The 80386 has six 16-bit segment registers used to hold segment selectors in protected mode or segment base addresses in real mode.

    RegisterNamePurpose
    CSCode SegmentPoints to the segment containing program code
    DSData SegmentPoints to the default data segment
    SSStack SegmentPoints to the stack segment
    ESExtra SegmentExtra segment for string operations
    FSF SegmentAdditional general-purpose segment
    GSG SegmentAdditional general-purpose segment

    3. Instruction Pointer (EIP) - 32-bit

    • EIP holds the offset address of the next instruction to be executed within the code segment.
    • It is automatically incremented after each instruction fetch.
    • Equivalent to the Program Counter (PC) in other architectures.

    4. Flag Register (EFLAGS) - 32-bit

    The EFLAGS register contains status, control, and system flags.

    Key flags include:

    FlagSymbolDescription
    Carry FlagCFSet on unsigned overflow
    Zero FlagZFSet when result is zero
    Sign FlagSFSet when result is negative
    Overflow FlagOFSet on signed overflow
    Parity FlagPFSet when result has even parity
    Trap FlagTFEnables single-step mode
    Interrupt FlagIFEnables/disables maskable interrupts
    Direction FlagDFControls direction of string operations

    5. Control Registers (CR0 - CR3)

    Used to control operating modes and memory management:

    RegisterPurpose
    CR0Contains system control flags (e.g., PE bit to enable protected mode)
    CR1Reserved
    CR2Holds the linear address that caused a page fault
    CR3Holds the base address of the page directory (used in paging)

    6. System Address Registers

    RegisterSizePurpose
    GDTR48-bitGlobal Descriptor Table Register
    IDTR48-bitInterrupt Descriptor Table Register
    LDTR16-bitLocal Descriptor Table Register
    TR16-bitTask Register

    7. Debug and Test Registers

    • DR0 - DR7: Debug registers used to set hardware breakpoints.
    • TR6, TR7: Test registers used for testing the Translation Lookaside Buffer (TLB).

    Summary Diagram

    80386 Registers
    ├── General Purpose: EAX, EBX, ECX, EDX, ESI, EDI, EBP, ESP (32-bit)
    ├── Segment Registers: CS, DS, SS, ES, FS, GS (16-bit)
    ├── Instruction Pointer: EIP (32-bit)
    ├── Flags Register: EFLAGS (32-bit)
    ├── Control Registers: CR0 - CR3
    ├── System Address Registers: GDTR, IDTR, LDTR, TR
    └── Debug Registers: DR0 - DR7
    

    The rich register organization of the 80386 allows it to support real mode, protected mode, and virtual 8086 mode, making it a powerful and flexible 32-bit processor.

  11. 115 marksGeneration Of Control SignalsAnswer

    Draw a logic diagram showing generation of memory and I/O read/write control signals in 8085 microprocessor. [5]

    The 8085 microprocessor generates four main control signals for memory and I/O operations using its primary control pins: Pin Function --------------- RD (active low) Read strobe - indicates read operation WR (active low) Write strobe - ...

  12. 125 marksInterrupt MaskingAnswer

    Write short notes on (any two):a. Program Counter b. Von-Neumann Architecture c. Interrupt Masking [5]

    --- The Program Counter (PC) is a 16-bit special-purpose register in the 8085 microprocessor. It is one of the most important registers in the CPU and plays a central role in program execution. - The PC holds the memory address of the ne...