Boolean Function F = AB + B'C: Sum of Maxterms

Step 1 - Given Data

• Boolean function: $F = AB + B'C$
• Variables: $A, B, C$ (3 variables, so $2^3 = 8$ combinations)
• Required: express as product (sum) of maxterms, with truth table; list two uses.

Step 2 - Solve

Truth Table

Check of B'C: when B=0, B'=1, so B'C = C. Rows 1 (C=1) and 5 (C=1) give 1. Rows where AB=1 are 6 and 7. All consistent.

Identifying Maxterms

Maxterms correspond to rows where F = 0: rows 0, 2, 3, 4.

Rule: variable appears uncomplemented if its bit = 0, complemented if its bit = 1.

Product of Maxterms Form

$$F = \prod M(0, 2, 3, 4)$$

$$\boxed{F = (A+B+C)(A+B'+C)(A+B'+C')(A'+B+C)}$$

Verification

Minterms (F = 1) at rows 1, 5, 6, 7: $$F = \sum m(1,5,6,7)$$ The two sets ${0,2,3,4}$ and ${1,5,6,7}$ are complementary and together cover all 8 rows. Correct.

Two Uses of Sum (Product) of Maxterms

1. OR-AND (two-level) circuit implementation: The POS canonical form maps directly to an OR-AND gate structure, which is economical when there are fewer 0-outputs than 1-outputs.

2. Canonical/standard reference form: It provides a unique standardized representation of a function, useful as a starting point for minimization (K-map, Quine-McCluskey) and for comparing whether two Boolean expressions are equivalent.

A − B Using 1's Complement Method

STEP 1 - EXTRACT (Given data)

• $A = 1010100$
• $B = 1000100$
• Operation: $A - B$ using 1's complement

Decimal check of inputs:

• $A = 1010100_2 = 64+16+4 = 84$
• $B = 1000100_2 = 64+4 = 68$

STEP 2 - SOLVE

Step 1: 1's Complement of B

Invert every bit of $B$:

B        = 1000100
1's comp = 0111011

Step 2: Add A and 1's complement of B

   1010100
 + 0111011
 ---------
  10001111

Bit-by-bit (right to left):

• $0+1 = 1$
• $0+1 = 1$
• $1+0 = 1$
• $0+1 = 1$
• $1+1 = 0$, carry 1
• $0+1+1 = 0$, carry 1
• $1+0+1 = 0$, carry 1 (carry out)

Result = $1,0001111$ (a carry out of 1 is generated).

Step 3: End-around carry

Since a carry is produced, the result is positive. Add the carry back to the 7-bit sum:

   0001111
 +       1
 ---------
   0010000

Step 4: Final Result

$$A - B = 0010000_2$$

Verification

$$0010000_2 = 16_{10}, \quad 84 - 68 = 16 \checkmark$$

Conclusion

$$A - B = 0010000_2 = 16_{10}$$

Memory Types and Basic Memory Operations

Different Types of Memory

1. Primary Memory (Main Memory)

• RAM (Random Access Memory): Volatile memory used to store data and programs currently in use.
  • SRAM (Static RAM): Uses flip-flops; faster, more expensive, used in cache memory.
  • DRAM (Dynamic RAM): Uses capacitors; slower, cheaper, used as main memory; needs periodic refresh.
• ROM (Read Only Memory): Non-volatile memory; stores permanent data/firmware.
  • PROM: Programmable ROM; can be written once.
  • EPROM: Erasable PROM; erased using UV light.
  • EEPROM: Electrically Erasable PROM; erased electrically.

2. Cache Memory

• High-speed memory located between CPU and main memory.
• Stores frequently accessed data to reduce access time.
• Levels: L1 (fastest, smallest), L2, L3.

3. Secondary Memory (Auxiliary Memory)

• Non-volatile, large capacity storage.
• Examples: Hard Disk Drive (HDD), Solid State Drive (SSD), Optical Disk, Magnetic Tape.

4. Registers

• Fastest memory, located inside the CPU.
• Temporarily hold data, instructions, and addresses during processing.

5. Virtual Memory

• A technique that uses secondary storage to extend the apparent size of primary memory.

Basic Memory Operations

Memory operations are the fundamental actions performed on a memory system:

1. Read Operation (Fetch / Load)

• Data is retrieved from a specific memory location and transferred to the CPU or a register.
• Steps:
  1. The CPU places the memory address on the Address Bus.
  2. A Read control signal (RD = 0 or active low) is sent via the Control Bus.
  3. The memory locates the addressed cell and places the data on the Data Bus.
  4. The CPU reads the data from the Data Bus.

CPU --> [Address Bus] --> Memory
CPU <-- [Data Bus]    <-- Memory
CPU --> [Control Bus: READ] --> Memory

2. Write Operation (Store)

• Data is transferred from the CPU and stored into a specific memory location.
• Steps:
  1. The CPU places the memory address on the Address Bus.
  2. The CPU places the data to be written on the Data Bus.
  3. A Write control signal (WR = 0 or active low) is sent via the Control Bus.
  4. The memory stores the data at the specified address.

CPU --> [Address Bus] --> Memory
CPU --> [Data Bus]    --> Memory
CPU --> [Control Bus: WRITE] --> Memory

Summary Table

Note: These two operations (Read and Write) form the foundation of all memory interactions in a computer system. All higher-level operations such as fetch-decode-execute cycles depend on these basic operations.

Short Notes

(a) Universal Gate

A universal gate is a logic gate that can be used to implement any Boolean function or any other logic gate (AND, OR, NOT, etc.) without needing any other type of gate.

The two universal gates are:

• NAND Gate
• NOR Gate

Why are they called Universal?

Because all basic gates can be realized using only NAND (or only NOR) gates:

Implementing Basic Gates using NAND:

Implementing Basic Gates using NOR:

Significance:

• Reduces the number of different gate types needed in circuit design.
• Simplifies manufacturing and reduces cost.
• NAND gates are widely used in digital IC design (e.g., TTL and CMOS families).

(b) Status Register (Flag Register)

A status register (also called a flag register or condition code register) is a special-purpose register in the CPU that holds individual flag bits reflecting the outcome of the most recently executed arithmetic or logical operation.

Common Flag Bits:

Importance:

• Used by conditional branch/jump instructions to make decisions (e.g., JZ, JC, JNZ).
• Enables the CPU to perform conditional execution and loop control.
• It is automatically updated after arithmetic and logical operations.

Example:

If we compute 5 - 5 = 0:

• Zero flag Z = 1 (result is zero)
• Sign flag S = 0 (result is not negative)

The status register is a key component in program flow control within the CPU.