i. Discuss the design of a typical input or output interface. ii. What are interrupts? How are they handled?

(i) Design of a typical I/O interface

 CPU buses                 Interface                Device
+----------+     +-----------------------+     +----------+
| Data bus |<--->| Data register/buffer  |<--->|  data    |
| Address  |---->| Address decoder       |     |          |
| Control  |<--->| Control, status regs  |<--->| control  |
| (RD, WR) |     | Timing and control    |     | and      |
| Interrupt|<----| Interrupt logic       |     | status   |
+----------+     +-----------------------+     +----------+

The main blocks are these:

• Address decoder: it checks the address on the address bus and selects the interface when its own address is seen.
• Data register (buffer): it holds the word being moved. It lets the fast CPU and the slow device work at different speeds.
• Control register: the CPU writes commands here, such as start, stop or the direction of transfer.
• Status register: it holds flags like ready, busy and error, which the CPU can read.
• Timing and control logic: it makes the read and write signals and the handshake signals for the device.
• Interrupt logic: it raises an interrupt request when the device needs service.

The CPU reads and writes these registers like memory locations (memory mapped) or through IN and OUT instructions (isolated). The interface also converts data between parallel form (CPU) and serial form (some devices) and changes voltage levels where needed.

(ii) Interrupts and how they are handled

An interrupt is a signal that makes the CPU stop the program it is running, serve an urgent event, and then come back. It lets the CPU avoid waiting for slow devices.

When an interrupt request arrives, the CPU does the following.

First, it completes the instruction it is executing. Then it checks whether interrupts are enabled. If they are, it sends an interrupt acknowledge.

Next, it saves the return address (the program counter) and the status flags on the stack. Further interrupts are usually disabled for a moment.

Then it finds the address of the service routine. In a vectored interrupt, the device supplies a vector number that points to the routine. In a non-vectored interrupt, the CPU jumps to one fixed address, and the routine polls the devices to find the source.

The interrupt service routine (ISR) runs next. It serves the device, for example by reading the data register. It ends with a return-from-interrupt instruction.

Finally, the CPU pops the saved flags and the program counter and carries on with the interrupted program as if nothing had happened.

If several devices interrupt together, priority decides which one is served first. Priority can be set by software polling or by hardware such as a daisy chain or a priority encoder.