Discuss the process of data transfer between registers, buses, and memory units in a digital system. Include explanations of read and write operations?

Register to register transfer

The content of one register is copied to another by $R2 \leftarrow R1$. R1 keeps its value. The transfer takes place only if a control condition is true, written as

$$P:\ R2 \leftarrow R1$$

When $P = 1$, the load input of R2 is enabled and the transfer takes place at the next clock pulse.

Transfer through a common bus

If a computer has many registers, joining each pair by wires is costly. So a common bus is used. The select lines of multiplexers (or the enable of three-state buffers) pick the source register, which puts its content on the bus. The destination register has its load input enabled. For example, to do $R3 \leftarrow R1$, the select lines choose R1 and the load of R3 is enabled. Only one source drives the bus in a clock pulse.

Memory transfer

Memory is accessed through the address register (AR) and the data register (DR). The AR holds the address of the word. DR holds the data being moved.

For a read, the address is placed in AR and the read signal is given. The memory places the word on the data lines, and it is loaded into DR.

$$Read:\ DR \leftarrow M[AR]$$

For a write, the address is placed in AR, the data in DR, and the write signal is given. The memory stores DR at the address AR.

$$Write:\ M[AR] \leftarrow DR$$

Each of these operations takes one memory cycle. A word transferred from memory to the CPU always goes through DR, and a word to be written is always taken from DR.

Example

To add a number from memory into a register, the sequence is $AR \leftarrow 500$, then $DR \leftarrow M[AR]$, then $R1 \leftarrow R1 + DR$. The first step loads the address, the second reads memory, and the third uses the ALU to add. In this way, data moves between registers, buses and memory, one controlled step at a time.