Explain with neat diagram, the address selection for control memory.

Parts of the circuit

• Multiplexer (MUX): it selects one of four possible next addresses.
• Incrementer: gives CAR plus one.
• Branch logic: tests the status bits chosen by the microinstruction and decides whether a branch is taken.
• Mapping logic: converts the opcode from the instruction register into a starting address.
• Subroutine register (SBR): stores the return address of a micro-subroutine.
• Control memory: a ROM that holds the microinstructions. It is read at the address in CAR.

How the next address is selected

The select lines of the multiplexer come from the branch logic. It gives four ways to choose the address.

1. Increment: CAR becomes $CAR + 1$. This is the normal flow, when the condition is false or no branch is wanted.
2. Branch: the address field of the microinstruction is loaded into CAR when the tested status bit is true. It is either a conditional or an unconditional jump.
3. External mapping: after the fetch routine, the opcode bits of the instruction are mapped to the first address of the routine that executes it. This is the way a machine instruction starts its microprogram.
4. Subroutine call and return: on a call, the return address is saved in SBR and the branch address is loaded in CAR. On a return, SBR is copied back into CAR.

Mapping example. Let the opcode be 4 bits and let each routine be allowed 4 microinstructions. Then the address is formed as 0, then the opcode, then 00. For opcode 1010 the address is 0101000, that is 40. If the opcode changes by one, the starting address changes by four, so the routines do not overlap. A 7 bit CAR can address $2^7 = 128$ words.

Working in sequence. The microinstruction read from the control memory has a condition field, a branch field and an address field. The condition field selects one status bit. The branch field tells the MUX what to choose when that bit is true. If the bit is false, the incrementer path is taken. At the next clock pulse the chosen address is stored in CAR, and the next microinstruction is read.

This arrangement lets the microprogram do loops, tests and calls, so complex instructions can be built from simple micro-steps without extra hardware for each.

Why this design is used. The same small circuit supports straight-line flow, loops, tests and shared micro-subroutines. For example, the routine that finds an indirect operand address is written once, and many instruction routines call it. This saves control memory. The cost is only a few extra gates and one register, so address selection stays cheap and fast.