A digital computer has a common bus system for 8 registers of 16 bit each. The bus is constructed using multiplexers. I. How many select input are there in each multiplexer? II. What is the size of multiplexers needed? III. How many multiplexers are there in the bus?

In a multiplexer bus, there is one multiplexer for each bit of the bus. All the registers feed their bits into these multiplexers, and a common set of select lines decides which register is put on the bus. The question gives 8 registers of 16 bits each.

I. Select inputs in each multiplexer

A multiplexer must be able to choose any one of the 8 registers. The number of select lines $k$ must satisfy $2^k \geq 8$.

$$2^k = 8 \Rightarrow k = \log_2 8 = 3$$

Therefore each multiplexer has 3 select inputs. The same 3 lines are connected to all multiplexers, so the 3-bit code selects the same register in every bit position.

II. Size of the multiplexers

Each multiplexer takes one bit from each of the 8 registers, so it has 8 data inputs and one output. The size of each multiplexer is 8 to 1, which is written as $8 \times 1$. It is also called an 8-to-1 line multiplexer.

III. Number of multiplexers

The bus carries 16 bits, because each register has 16 bits. We need one multiplexer for each bit.

$$\text{number of multiplexers} = 16$$

Multiplexer 0 takes bit 0 of all 8 registers, multiplexer 1 takes bit 1 of all registers, and so on up to multiplexer 15.

 R0..R7 (16 bits each)
  bit15 of R0..R7 --> [MUX 15 8x1] --+
  ...                                |--> 16-bit bus
  bit 0 of R0..R7 --> [MUX  0 8x1] --+
        S2 S1 S0 (common select lines)

Check of the totals

The total number of data inputs to all the multiplexers is $16 \times 8 = 128$. This is the same as the total number of register bits, $8 \times 16 = 128$. So every register bit is connected to exactly one multiplexer input.

Working of the bus

Suppose the select code is $S_2S_1S_0 = 101$. This chooses register R5. All 16 bits of R5 appear on the bus at the same time. If the load input of register R2 is also enabled, then at the next clock pulse the transfer $R2 \leftarrow R5$ takes place.

Select lines and their register:

Only one register can drive the bus at any moment, so there is no conflict. This is the main advantage of the multiplexer bus. Its disadvantage is the large number of gates. Here we need 16 multiplexers of size 8 to 1.

Therefore the bus needs 3 select inputs per multiplexer, 8-to-1 multiplexers, and 16 multiplexers in all.