Explain the different cycles of an instruction execution.

Fetch cycle. The address in PC goes to the address register, and the instruction is read from memory into IR. Then PC is incremented.

$$AR \leftarrow PC$$

$$IR \leftarrow M[AR],; PC \leftarrow PC + 1$$

Decode cycle. The control unit decodes the opcode in IR. It also finds out the addressing mode from the mode bit. This tells how the operand is to be found.

Indirect cycle. If the address is indirect, the effective address is read from memory:

$$AR \leftarrow M[AR]$$

For direct addressing this cycle is skipped.

Execute cycle. The operation named by the opcode is carried out. A memory-reference instruction reads the operand and uses it. A register-reference instruction works on registers only. An input-output instruction moves data to or from a device. A branch instruction loads a new value in PC.

Interrupt cycle. After execution, the CPU checks if an interrupt is waiting. If so, it saves PC, and jumps to the interrupt service routine. If not, the cycle goes back to fetch.

The diagram shows these cycles in order and the way that execution goes back to fetch for the next instruction. The sequence counter times each cycle with the pulses T0, T1, T2 and so on. This is how every instruction of a program is run, one after another.

For example, in ADD 500, fetch brings the instruction in, decode finds the ADD, the indirect cycle is skipped, execute reads the word at 500 and adds it to AC, and the interrupt check follows.

Notes on the sub cycles. The fetch cycle is the same for all instructions, but the execute cycle is different for each. A register-reference instruction needs no memory read and finishes quickly, while a memory-reference instruction needs at least one memory access. Because of this, the number of clock pulses is not the same for each instruction. The control unit uses the sequence counter to track the pulse, and clears it at the end of the instruction.